Latches and Flip-Flops 1 - The SR Latch

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This is the first in a series of computer science videos about latches and flip-flops. These bi-stable combinations of logic gates form the basis of computer memory, counters, shift registers, and more. In particular, this video covers the set-reset latch, otherwise known as the SR latch. It begins by reviewing the basic building blocks of SR latches, namely NOR gates and NAND gates, then goes on to describe the workings of an ‘active high’ SR latch built using NOR gates, and the workings of an ‘active low’ SR latch built using NAND gates. Truth tables that describe the behaviour of SR latches are also covered, including the invalid combination of inputs that might result in a race condition. Applications of SR latches are mentioned, such as mechanical switch de-bouncing. The videos that follow this one build upon the principles covered here and include the gated SR latch, the gated D latch, edge triggered pulse latches and the master slave D type flip-flop.
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